dc.creator |
Kundaeli, Herald N. |
|
dc.date |
2016-09-29T14:52:25Z |
|
dc.date |
2016-09-29T14:52:25Z |
|
dc.date |
1993 |
|
dc.date.accessioned |
2018-03-27T08:52:49Z |
|
dc.date.available |
2018-03-27T08:52:49Z |
|
dc.identifier |
Kundaeli, H.N., 1993. Design parameters for a bit-synchronized transmission system. International Journal of Electronics Theoretical and Experimental, 75(3), pp.393-405. |
|
dc.identifier |
http://hdl.handle.net/20.500.11810/4319 |
|
dc.identifier |
10.1080/00207219308907118 |
|
dc.identifier.uri |
http://hdl.handle.net/20.500.11810/4319 |
|
dc.description |
Full text can be accessed at
http://www.tandfonline.com/doi/abs/10.1080/00207219308907118 |
|
dc.description |
The transmission reliability of transmission systems that employ synchronization codes For frame synchronization has been analysed in a previous report (Kundaeli 1991) in which it was shown that the introduction of verify states in the synchronization recovery and loss paths of the receiver resulted in increased reliability. Here we extend that analysis to provide a general method for determining the receiver design and performance parameters. We first derive the synchronization efficiency as a new performance parameter, then the applicable number of verify states for a receiver for practical ranges of both the channel error-rate and frame length. |
|
dc.language |
en |
|
dc.publisher |
Taylor & Francis |
|
dc.title |
Design Parameters for a Bit-Synchronized Transmission System |
|
dc.type |
Journal Article, Peer Reviewed |
|